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| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2018-10-08 07:05:28 +0200 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2018-10-08 07:05:28 +0200 |
| commit | 2fecc5789efc1cf1f0343890a363adc7ccaaeda5 (patch) | |
| tree | a4380030871948b76935d016d06f7b3ab2f3fbfe /lib | |
| parent | a71a57f8f26f2eec86266e2f7febf9c839781df4 (diff) | |
| download | plan9front-2fecc5789efc1cf1f0343890a363adc7ccaaeda5.tar.xz | |
usbxhci: delay after reset, preserve reserved bits in legacy status control register in handoff()
when clering smi enable bits in the legacy control/status register,
preserve the reserved bits. clear the RW1C bits.
linux code claims intel xhci controller needs a 1ms delay before
accessing any register after reset.
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions