diff options
| -rw-r--r-- | sys/src/9/alphapc/io.h | 2 | ||||
| -rw-r--r-- | sys/src/9/kw/io.h | 2 | ||||
| -rw-r--r-- | sys/src/9/mtx/io.h | 2 | ||||
| -rw-r--r-- | sys/src/9/teg2/io.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/sys/src/9/alphapc/io.h b/sys/src/9/alphapc/io.h index b4c29d3b2..51ce7e228 100644 --- a/sys/src/9/alphapc/io.h +++ b/sys/src/9/alphapc/io.h @@ -95,7 +95,7 @@ enum { /* type 0 and type 1 pre-defined header */ enum { /* type 0 pre-defined header */ PciCIS = 0x28, /* cardbus CIS pointer */ PciSVID = 0x2C, /* subsystem vendor ID */ - PciSID = 0x2E, /* cardbus CIS pointer */ + PciSID = 0x2E, /* subsystem ID */ PciEBAR0 = 0x30, /* xpansion ROM base address */ PciMGNT = 0x3E, /* burst period length */ PciMLT = 0x3F, /* maximum latency between bursts */ diff --git a/sys/src/9/kw/io.h b/sys/src/9/kw/io.h index f1ad24689..b05603254 100644 --- a/sys/src/9/kw/io.h +++ b/sys/src/9/kw/io.h @@ -96,7 +96,7 @@ enum { enum { /* type 0 pre-defined header */ PciCIS = 0x28, /* cardbus CIS pointer */ PciSVID = 0x2C, /* subsystem vendor ID */ - PciSID = 0x2E, /* cardbus CIS pointer */ + PciSID = 0x2E, /* subsystem ID */ PciEBAR0 = 0x30, /* expansion ROM base address */ PciMGNT = 0x3E, /* burst period length */ PciMLT = 0x3F, /* maximum latency between bursts */ diff --git a/sys/src/9/mtx/io.h b/sys/src/9/mtx/io.h index 59f13d815..255debf97 100644 --- a/sys/src/9/mtx/io.h +++ b/sys/src/9/mtx/io.h @@ -93,7 +93,7 @@ enum { /* type 0 and type 1 pre-defined header */ enum { /* type 0 pre-defined header */ PciCIS = 0x28, /* cardbus CIS pointer */ PciSVID = 0x2C, /* subsystem vendor ID */ - PciSID = 0x2E, /* cardbus CIS pointer */ + PciSID = 0x2E, /* subsystem ID */ PciEBAR0 = 0x30, /* expansion ROM base address */ PciMGNT = 0x3E, /* burst period length */ PciMLT = 0x3F, /* maximum latency between bursts */ diff --git a/sys/src/9/teg2/io.h b/sys/src/9/teg2/io.h index 703e0cbe4..e56d6c354 100644 --- a/sys/src/9/teg2/io.h +++ b/sys/src/9/teg2/io.h @@ -107,7 +107,7 @@ enum { enum { /* type 0 pre-defined header */ PciCIS = 0x28, /* cardbus CIS pointer */ PciSVID = 0x2C, /* subsystem vendor ID */ - PciSID = 0x2E, /* cardbus CIS pointer */ + PciSID = 0x2E, /* subsystem ID */ PciEBAR0 = 0x30, /* expansion ROM base address */ PciMGNT = 0x3E, /* burst period length */ PciMLT = 0x3F, /* maximum latency between bursts */ |