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| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-11-01 12:10:10 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-11-01 12:10:10 +0100 |
| commit | d901fbe4f1e7191b757355384504d7560e8d040e (patch) | |
| tree | f69758af293fcab2acaec0f8a97d68e5469f3e40 | |
| parent | c184d2602d62225997fd1c5eae9fd602f7924d5b (diff) | |
| download | plan9front-d901fbe4f1e7191b757355384504d7560e8d040e.tar.xz | |
libmp: add mpvecdigmuladd()/mpvecdigmulsub() assembly routines for arm
| -rw-r--r-- | sys/src/libmp/arm/mkfile | 8 | ||||
| -rw-r--r-- | sys/src/libmp/arm/mpvecdigmuladd.s | 19 | ||||
| -rw-r--r-- | sys/src/libmp/arm/mpvecdigmulsub.s | 22 |
3 files changed, 46 insertions, 3 deletions
diff --git a/sys/src/libmp/arm/mkfile b/sys/src/libmp/arm/mkfile index e90c8b6ab..c939f5c41 100644 --- a/sys/src/libmp/arm/mkfile +++ b/sys/src/libmp/arm/mkfile @@ -2,12 +2,14 @@ objtype=arm </$objtype/mkfile LIB=/$objtype/lib/libmp.a -OFILES= \ +SFILES=mpvecdigmuladd.s mpvecdigmulsub.s HFILES=/$objtype/include/u.h /sys/include/mp.h ../port/dat.h -UPDATE=\ - mkfile\ +OFILES=${SFILES:%.s=%.$O} + +UPDATE=mkfile\ $HFILES\ + $SFILES\ </sys/src/cmd/mksyslib diff --git a/sys/src/libmp/arm/mpvecdigmuladd.s b/sys/src/libmp/arm/mpvecdigmuladd.s new file mode 100644 index 000000000..a3833bee0 --- /dev/null +++ b/sys/src/libmp/arm/mpvecdigmuladd.s @@ -0,0 +1,19 @@ +TEXT mpvecdigmuladd(SB),$0 + MOVW n+4(FP),R4 + MOVW m+8(FP),R5 + MOVW p+12(FP),R6 + MOVW $0, R2 +_muladdloop: + MOVW $0, R1 + MOVW.W.P 4(R0), R3 + MULALU R3, R5, (R1, R2) + MOVW (R6), R7 + ADD.S R2, R7 + ADC $0, R1, R2 + MOVW.W.P R7, 4(R6) + SUB.S $1, R4 + B.NE _muladdloop + MOVW (R6), R7 + ADD R2, R7 + MOVW R7, (R6) + RET diff --git a/sys/src/libmp/arm/mpvecdigmulsub.s b/sys/src/libmp/arm/mpvecdigmulsub.s new file mode 100644 index 000000000..7f877a64b --- /dev/null +++ b/sys/src/libmp/arm/mpvecdigmulsub.s @@ -0,0 +1,22 @@ +TEXT mpvecdigmulsub(SB),$0 + MOVW n+4(FP),R4 + MOVW m+8(FP),R5 + MOVW p+12(FP),R6 + MOVW $0, R2 +_mulsubloop: + MOVW $0, R1 + MOVW.W.P 4(R0), R3 + MULALU R3, R5, (R1, R2) + MOVW (R6), R7 + SUB.S R2, R7 + ADD.CC $1, R1 + MOVW R1, R2 + MOVW.W.P R7, 4(R6) + SUB.S $1, R4 + B.NE _mulsubloop + MOVW (R6), R7 + SUB.S R2, R7 + MOVW.CS $1, R0 + MOVW.CC $-1, R0 + MOVW R7, (R6) + RET |