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| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2020-12-10 01:47:19 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2020-12-10 01:47:19 +0100 |
| commit | cef91f23e787a9e01916b35cf35347b964f03a3b (patch) | |
| tree | 46a06fcd3360db5ef234555c0e587ee3c2585000 | |
| parent | 635be848319c7254f176f8daaf912393ffe2cdcb (diff) | |
| download | plan9front-cef91f23e787a9e01916b35cf35347b964f03a3b.tar.xz | |
pc, pc64: work around bhyve all uncached MTRR's
| -rw-r--r-- | sys/src/9/pc/memory.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/sys/src/9/pc/memory.c b/sys/src/9/pc/memory.c index 6df499728..f15f6e776 100644 --- a/sys/src/9/pc/memory.c +++ b/sys/src/9/pc/memory.c @@ -383,8 +383,16 @@ e820scan(void) } } - /* RAM needs to be writeback */ - mtrrexclude(MemRAM, "wb"); + /* + * Make sure RAM is set to writeback, + * but do a sanity check first checking + * that the kernel text is writeback. + * This is needed as some emulators (bhyve) + * set everything to uncached. + */ + s = mtrrattr(PADDR(KTZERO), nil); + if(s != nil && strcmp(s, "wb") == 0) + mtrrexclude(MemRAM, "wb"); for(base = memmapnext(-1, MemRAM); base != -1; base = memmapnext(base, MemRAM)){ size = memmapsize(base, BY2PG) & ~(BY2PG-1); |