usbehci: use 64-bit base address, remove resetlck, simplify scanpci()

6 files changed, 46 insertions, 78 deletions

diff --git a/sys/src/9/omap/usbehci.h b/sys/src/9/omap/usbehci.h
index f20c4ecd8..f9ee28128 100644
--- a/sys/src/9/omap/usbehci.h
+++ b/sys/src/9/omap/usbehci.h
@@ -220,7 +220,6 @@ enum {
 	P1ulpi_bypass = 1<<0,	/* utmi if set; else ulpi */
 };
 
-extern Ecapio *ehcidebugcapio;
 extern int ehcidebugport;
 
 extern int ehcidebug;
diff --git a/sys/src/9/omap/usbehciomap.c b/sys/src/9/omap/usbehciomap.c
index 8be97c323..e9db47f86 100644
--- a/sys/src/9/omap/usbehciomap.c
+++ b/sys/src/9/omap/usbehciomap.c
@@ -40,17 +40,15 @@ ehcireset(Ctlr *ctlr)
 		opio->seg = 0;
 	}
 
-	if(ehcidebugcapio != ctlr->capio){
-		opio->cmd |= Chcreset;	/* controller reset */
-		coherence();
-		for(i = 0; i < 100; i++){
-			if((opio->cmd & Chcreset) == 0)
-				break;
-			delay(1);
-		}
-		if(i == 100)
-			print("ehci %#p controller reset timed out\n", ctlr->capio);
+	opio->cmd |= Chcreset;	/* controller reset */
+	coherence();
+	for(i = 0; i < 100; i++){
+		if((opio->cmd & Chcreset) == 0)
+			break;
+		delay(1);
 	}
+	if(i == 100)
+		print("ehci %#p controller reset timed out\n", ctlr->capio);
 
 	/* requesting more interrupts per µframe may miss interrupts */
 	opio->cmd |= 0x10000;		/* 1 intr. per ms */
diff --git a/sys/src/9/pc/usbehci.h b/sys/src/9/pc/usbehci.h
index 8239ce752..567d0e11c 100644
--- a/sys/src/9/pc/usbehci.h
+++ b/sys/src/9/pc/usbehci.h
@@ -170,7 +170,8 @@ struct Ctlr
 	Lock;			/* for ilock. qh lists and basic ctlr I/O */
 	QLock	portlck;	/* for port resets/enable... (and doorbell) */
 	int	active;		/* in use or not */
-	uintptr	base;
+	Ctlr*	next;
+	uvlong	base;
 	Pcidev*	pcidev;
 	Ecapio*	capio;		/* Capability i/o regs */
 	Eopio*	opio;		/* Operational i/o regs */
@@ -218,7 +219,6 @@ struct Eopio
 };
 
 extern int ehcidebug;
-extern Ecapio *ehcidebugcapio;
 extern int ehcidebugport;
 
 void	ehcilinkage(Hci *hp);
diff --git a/sys/src/9/pc/usbehcipc.c b/sys/src/9/pc/usbehcipc.c
index 276bba117..08cfe0630 100644
--- a/sys/src/9/pc/usbehcipc.c
+++ b/sys/src/9/pc/usbehcipc.c
@@ -15,9 +15,6 @@
 #include	"../port/usb.h"
 #include	"usbehci.h"
 
-static Ctlr* ctlrs[Nhcis];
-static int maxehci = Nhcis;
-
 static int
 ehciecap(Ctlr *ctlr, int cap)
 {
@@ -66,11 +63,12 @@ ehcireset(Ctlr *ctlr)
 	dprint("ehci %#p reset\n", ctlr->capio);
 	opio = ctlr->opio;
 
-	/*
-	 * reclaim from bios
-	 */
+	/* reclaim from bios */
 	getehci(ctlr);
 
+	/* disable interrupts */
+	opio->intr = 0;
+
 	/*
 	 * halt and route ports to companion controllers
 	 * until we are setup
@@ -88,17 +86,16 @@ ehcireset(Ctlr *ctlr)
 		coherence();
 	}
 
-	if(ehcidebugcapio != ctlr->capio){
-		opio->cmd |= Chcreset;	/* controller reset */
-		coherence();
-		for(i = 0; i < 100; i++){
-			if((opio->cmd & Chcreset) == 0)
-				break;
-			delay(1);
-		}
-		if(i == 100)
-			print("ehci %#p controller reset timed out\n", ctlr->capio);
+	opio->cmd |= Chcreset;	/* controller reset */
+	coherence();
+	for(i = 0; i < 100; i++){
+		if((opio->cmd & Chcreset) == 0)
+			break;
+		delay(1);
 	}
+	if(i == 100)
+		print("ehci %#p controller reset timed out\n", ctlr->capio);
+
 	opio->cmd |= Citc1;		/* 1 intr. per µframe */
 	coherence();
 	switch(opio->cmd & Cflsmask){
@@ -115,6 +112,7 @@ ehcireset(Ctlr *ctlr)
 		panic("ehci: unknown fls %ld", opio->cmd & Cflsmask);
 	}
 	dprint("ehci: %d frames\n", ctlr->nframes);
+
 	iunlock(ctlr);
 }
 
@@ -134,7 +132,12 @@ shutdown(Hci *hp)
 	ctlr = hp->aux;
 	ilock(ctlr);
 	opio = ctlr->opio;
-	opio->cmd |= Chcreset;		/* controller reset */
+
+	/* disable interrupts */
+	opio->intr = 0;
+
+	/* controller reset */
+	opio->cmd |= Chcreset;
 	coherence();
 	for(i = 0; i < 100; i++){
 		if((opio->cmd & Chcreset) == 0)
@@ -149,19 +152,19 @@ shutdown(Hci *hp)
 	iunlock(ctlr);
 }
 
-static void
+static Ctlr*
 scanpci(void)
 {
-	static int already = 0;
-	int i;
-	uvlong io;
+	static Ctlr *first, **lastp;
 	Ctlr *ctlr;
 	Pcidev *p;
 	Ecapio *capio;
+	uvlong io;
+
+	if(lastp != nil)
+		return first;
+	lastp = &first;
 
-	if(already)
-		return;
-	already = 1;
 	p = nil;
 	while ((p = pcimatch(p, 0, 0)) != nil) {
 		/*
@@ -173,7 +176,7 @@ scanpci(void)
 		case 0x20:
 			if(p->mem[0].bar & 1)
 				continue;
-			io = p->mem[0].bar & ~0x0f;
+			io = p->mem[0].bar & ~0xFULL;
 			break;
 		default:
 			continue;
@@ -200,59 +203,36 @@ scanpci(void)
 		ctlr->pcidev = p;
 		ctlr->base = io;
 		ctlr->capio = capio;
-		for(i = 0; i < Nhcis; i++)
-			if(ctlrs[i] == nil){
-				ctlrs[i] = ctlr;
-				break;
-			}
-		if(i >= Nhcis)
-			print("ehci: bug: more than %d controllers\n", Nhcis);
 
-		/*
-		 * currently, if we enable a second ehci controller,
-		 * we'll wedge solid after iunlock in init for the second one.
-		 */
-		if (i >= maxehci) {
-			iprint("usbehci: ignoring controllers after first %d, "
-				"at %.8llux\n", maxehci, io);
-			ctlrs[i] = nil;
-		}
+		*lastp = ctlr;
+		lastp = &ctlr->next;
 	}
+
+	return first;
 }
 
 static int
 reset(Hci *hp)
 {
-	int i;
-	char *s;
 	Ctlr *ctlr;
 	Ecapio *capio;
 	Pcidev *p;
-	static Lock resetlck;
 
-	s = getconf("*maxehci");
-	if (s != nil && s[0] >= '0' && s[0] <= '9')
-		maxehci = atoi(s);
-	if(maxehci == 0 || getconf("*nousbehci"))
+	if(getconf("*nousbehci"))
 		return -1;
-	ilock(&resetlck);
-	scanpci();
 
 	/*
 	 * Any adapter matches if no hp->port is supplied,
 	 * otherwise the ports must match.
 	 */
-	ctlr = nil;
-	for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
-		ctlr = ctlrs[i];
+	for(ctlr = scanpci(); ctlr != nil; ctlr = ctlr->next){
 		if(ctlr->active == 0)
 		if(hp->port == 0 || hp->port == ctlr->base){
 			ctlr->active = 1;
 			break;
 		}
 	}
-	iunlock(&resetlck);
-	if(i >= Nhcis || ctlrs[i] == nil)
+	if(ctlr == nil)
 		return -1;
 
 	p = ctlr->pcidev;
diff --git a/sys/src/9/port/usbehci.c b/sys/src/9/port/usbehci.c
index 6b1c9f12e..1d2dd6d49 100644
--- a/sys/src/9/port/usbehci.c
+++ b/sys/src/9/port/usbehci.c
@@ -370,7 +370,6 @@ static Edpool edpool;
 static char Ebug[] = "not yet implemented";
 static char* qhsname[] = { "idle", "install", "run", "done", "close", "FREE" };
 
-Ecapio* ehcidebugcapio;
 int ehcidebugport;
 
 void
@@ -3250,7 +3249,6 @@ init(Hci *hp)
 {
 	Ctlr *ctlr;
 	Eopio *opio;
-	static int ctlrno;
 	int i;
 
 	hp->highspeed = 1;
@@ -3280,7 +3278,6 @@ init(Hci *hp)
 	iunlock(ctlr);
 	if(ehcidebug > 1)
 		dump(hp);
-	ctlrno++;
 }
 
 void
@@ -3297,7 +3294,5 @@ ehcilinkage(Hci *hp)
 	hp->portenable = portenable;
 	hp->portreset = portreset;
 	hp->portstatus = portstatus;
-//	hp->shutdown = shutdown;
-//	hp->debug = setdebug;
 	hp->type = "ehci";
 }
diff --git a/sys/src/9/zynq/usbehcizynq.c b/sys/src/9/zynq/usbehcizynq.c
index cb1562a43..be5053fa5 100644
--- a/sys/src/9/zynq/usbehcizynq.c
+++ b/sys/src/9/zynq/usbehcizynq.c
@@ -105,16 +105,13 @@ portstatus(Hci *hp, int port)
 static int
 reset(Hci *hp)
 {
-	static Lock resetlck;
 	Ctlr *ctlr;
 	
-	ilock(&resetlck);
 	for(ctlr = ctlrs; ctlr->base != 0; ctlr++)
 		if(!ctlr->active && (hp->port == 0 || hp->port == ctlr->base)){
 			ctlr->active = 1;
 			break;
 		}
-	iunlock(&resetlck);
 	if(ctlr->base == 0)
 		return -1;
 	hp->port = ctlr->base;
@@ -140,8 +137,7 @@ reset(Hci *hp)
 	ehciportstatus = hp->portstatus;
 	hp->portstatus = portstatus;
 
-	if(hp->interrupt != nil)
-		intrenable(hp->irq, hp->interrupt, hp, LEVEL, hp->type);
+	intrenable(hp->irq, hp->interrupt, hp, LEVEL, hp->type);
 	return 0;
 }