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| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2020-12-08 16:00:57 +0100 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2020-12-08 16:00:57 +0100 |
| commit | 263dc8093d7eeece36160515b3a4f76a95352050 (patch) | |
| tree | 703256892d701542ad9625a0a27c342d2b7c66c2 | |
| parent | 4db8a82f5a5afbd72abb6d251f67edb0b251d556 (diff) | |
| download | plan9front-263dc8093d7eeece36160515b3a4f76a95352050.tar.xz | |
pc64: preserve reserved bits in CR0/CR4 for amd64 in mtrr setstate()
On AMD64, CR0/CR4 are 64-bit registers, with
the upper half reserved. So use uintptr type
to store the register values to get 32 bit on 386
and 64 bit on AMD64.
| -rw-r--r-- | sys/src/9/pc/mtrr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/src/9/pc/mtrr.c b/sys/src/9/pc/mtrr.c index 7adb13a64..a2dd475b0 100644 --- a/sys/src/9/pc/mtrr.c +++ b/sys/src/9/pc/mtrr.c @@ -354,7 +354,7 @@ enum { static void putstate(State *s) { - ulong cr0, cr4; + uintptr cr0, cr4; int i, x; x = splhi(); |