From 658c994cfff444e0d473dbd312638c4f609fcc81 Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Fri, 11 Dec 2020 15:21:44 +0100
Subject: pc, pc64: ignore MTRR's when MTRRCap.vcnt and MTRRCap.fix are zero

Bhyve returns 0 in MTRRCap register, so we
can use that instead on relying on cpuid only
to see if MTRR's are supported.

That way we can get rid of the sanity check
in memory.c.
---
 sys/src/9/pc/memory.c | 12 ++----------
 sys/src/9/pc/mtrr.c   | 10 +++++++---
 2 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/sys/src/9/pc/memory.c b/sys/src/9/pc/memory.c
index f15f6e776..6df499728 100644
--- a/sys/src/9/pc/memory.c
+++ b/sys/src/9/pc/memory.c
@@ -383,16 +383,8 @@ e820scan(void)
 		}
 	}
 
-	/*
-	 * Make sure RAM is set to writeback,
-	 * but do a sanity check first checking
-	 * that the kernel text is writeback.
-	 * This is needed as some emulators (bhyve)
-	 * set everything to uncached.
-	 */
-	s = mtrrattr(PADDR(KTZERO), nil);
-	if(s != nil && strcmp(s, "wb") == 0)
-		mtrrexclude(MemRAM, "wb");
+	/* RAM needs to be writeback */
+	mtrrexclude(MemRAM, "wb");
 
 	for(base = memmapnext(-1, MemRAM); base != -1; base = memmapnext(base, MemRAM)){
 		size = memmapsize(base, BY2PG) & ~(BY2PG-1);
diff --git a/sys/src/9/pc/mtrr.c b/sys/src/9/pc/mtrr.c
index a2dd475b0..7601ef543 100644
--- a/sys/src/9/pc/mtrr.c
+++ b/sys/src/9/pc/mtrr.c
@@ -305,11 +305,13 @@ getstate(State *s)
 	vlong v;
 	int i;
 
-	s->mask = physmask();
+	if(rdmsr(MTRRCap, &s->cap) < 0)
+		return -1;
 
-	if(rdmsr(MTRRDefaultType, &s->def) < 0)
+	if((s->cap & (Capfix|Capvcnt)) == 0)
 		return -1;
-	if(rdmsr(MTRRCap, &s->cap) < 0)
+
+	if(rdmsr(MTRRDefaultType, &s->def) < 0)
 		return -1;
 
 	if(s->cap & Capfix){
@@ -332,6 +334,8 @@ getstate(State *s)
 			return -1;
 	}
 
+	s->mask = physmask();
+
 	if(strcmp(m->cpuidid, "AuthenticAMD") != 0
 	|| m->cpuidfamily < 15
 	|| rdmsr(AMDK8SysCfg, &v) < 0
-- 
cgit v1.2.3


From fc0f08c65112e50a75d77042d8249b6bd15a3b76 Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Fri, 11 Dec 2020 15:23:03 +0100
Subject: pc, pc64: make sure write combining is supported in MTRR's before
 setting it

---
 sys/src/9/pc/mtrr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sys/src/9/pc/mtrr.c b/sys/src/9/pc/mtrr.c
index 7601ef543..f840b159d 100644
--- a/sys/src/9/pc/mtrr.c
+++ b/sys/src/9/pc/mtrr.c
@@ -678,6 +678,10 @@ mtrr(uvlong base, uvlong size, char *tstr)
 	if((new.type = str2type(tstr)) < 0)
 		return "bad cache type";
 
+	if(new.type == Writecomb
+	&& (cpu0state.cap & Capwc) == 0)
+		return "write combining not supported";
+
 	qlock(&mtrrlk);
 	newstate = cpu0state;
 	nr = getranges(&newstate, ranges, Nranges, &new);
-- 
cgit v1.2.3