From 1f7eb17f4b887e2f448a73053f3e3ed1b7fdbfda Mon Sep 17 00:00:00 2001
From: google <google@daverabbitz.ath.cx>
Date: Wed, 19 Sep 2012 21:07:44 +1200
Subject: Enable busmastering for SCH (Poulsbo) PATA controller.

---
 sys/src/9/pc/sdide.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/sys/src/9/pc/sdide.c b/sys/src/9/pc/sdide.c
index b9b237c57..071431aae 100644
--- a/sys/src/9/pc/sdide.c
+++ b/sys/src/9/pc/sdide.c
@@ -2129,6 +2129,10 @@ atapnp(void)
 				map |= 2;
 			irqack = ichirqack;
 			break;
+		case (0x811a<<16)|0x8086:	/* Intel SCH (Poulsbo) */
+			map = 1;
+			irqack = ichirqack;
+			break;
 		}
 		for(channel = 0; channel < 2; channel++){
 			if((map & 1<<channel) == 0)
@@ -2255,7 +2259,8 @@ ataenable(SDev* sdev)
 		atadmaclr(ctlr);
 		if(ctlr->pcidev != nil)
 			pcisetbme(ctlr->pcidev);
-		ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 4, 0, 64*1024);
+		/* Intel SCH requires 8 byte alignment, though datasheet says 4 m( */
+		ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 8, 0, 64*1024);
 	}
 	snprint(name, sizeof(name), "%s (%s)", sdev->name, sdev->ifc->name);
 	intrenable(ctlr->irq, atainterrupt, ctlr, ctlr->tbdf, name);
-- 
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