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loading the interrupt vector table early allows
us to handle traps during bootup before mmuinit()
which gives better diagnostics for debugging.
we also can handle general protection fault on
rdmsr() and wrmsr() which helps during
cpuidentify() and archinit() when probing for
cpu features.
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before removing the double map at 0, load our
initial gdt pointer with its new KZERO based
virtual address.
this is prerequisite for handling traps early during
bootup before mmuinit() loads the final gdt.
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The fsdestroyfid() is called regardless if the open succeeded
or failed. This causes erroneous videoclose() when opening
the frame or video file while the camera is active.
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When using /dev/reboot, the MSI vecor might have already
been setup causing interrupts to fire on the designated
cpu while we send the commands to the card.
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reseting irbsts bits in hdacmd() only works
while interrupts are disabled during hdareset().
once interrupts are enabled we need to reset the
irbsts bits in the interrupt handler or else the
interrupt never clears and locks up the system.
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The pop3 options were prefixed with a '-'; the
imap4d options were not. Proofreading, foolks.
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Upas/marshal -F was broken with the '-8' command, and silly
without it: It used aliases passed on the command line, so
the destination address was ignored with -8 was passed.
In addition, it would create a new mailbox for any aliases
being sent to, instead of putting them all in one location.
The new -S option is similar to -F, but specifies where the
message should go.
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The change 3306:c5cf77167bfe made the code reuse MTRR slots
of the default memory type.
But this did not take overlapping ranges into account!
If two or more variable-range MTRRs overlap, the following rules apply:
a. If the memory types are identical, then that memory type is used.
b. If at least one of the memory types is UC, then UC memory type is used.
c. If at least of of the memory types is WT. and the only other memory type
is WB, then th WT memory type is used.
d. If the combination of memory types is not listed above,
then the memory type used in undefined.
It so happend that on a Dell Latitude E7450 that the BIOS defines
the default type as UC. and the first slot defines a 16GB range
of type WB. Then the rest of the ranges mark the PCI space back
as UC, but overlapping the first WB range! This works because
of rule (B) above.
When trying to make the framebuffer write-combining, we would
falsely reuse one of the UC sub-ranges and making the UC memory
into WB as a side effect.
Thanks to Fulton for his patience and providing debug logs and
doing experiments for us to narrow the problem down.
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port/iomap.c
With some newer UEFI firmware, not all pci bars get
programmed and we have to assign them ourselfs.
This was already done for memory bars. This change
adds the same for i/o port space, by providing a
ioreservewin() function which can be used to allocate
port space within the parent pci-pci bridge window.
Also, the pci code now allocates the pci config
space i/o ports 0xCF8/0xCFC so userspace needs to
use devpnp to access pci config space now. (see
latest realemu change).
Also, this moves the ioalloc()/iofree() code out
of devarch into port/iomap.c as it can be shared
with the ppc mtx kernel.
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libcommon.a$O doesn't end with a .a, so mk
doesn't know how to look inside it in order
to check if the files are up to date.
This means that when 'mk clean' is run,
libcommon.a$O looks up to date:
% mk clean
...
% mk
mk: 'default' is up to date
Deleting the library works around this problem.
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When $wsys doesn't exist (eg, drawterm -G, or
rcpu from a text console), the profile would
create an empty $wsys variable, and sessions
started in this environment would fail with a
null list in concatenation.
This change tests if /mnt/term/env/wsys exists
before assigning it.
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This prevents VESA bios from accessing the pci
CONFIG_ADDRESS/CONFIG_DATA registers (0xCF8/0xCFC)
directly to access pci config space.
This makes sure the access to pci config space is
properly serialized by the kernel.
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These bits are reserved, and by the specification,
must return zero on read.
This is also used by plan 9 for detecting config mode #1.
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This change provides a location for errors
like 'null list in concatenation'.
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This allows us to attach additional context
to the biobuf so can read from some sort of
data structure without a global variable.
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Our qsort has an optimization to recurse on one
half of the array, and do a tail call on the other
half. Unfortunately, the condition deciding which
half of the array to recurse on was wrong, so we
were recursing on the larger half of the array and
iterating on the smaller half.
This meant that if we picked the partition poorly,
we were pessimizing our stack usage instead of
optimizing it.
This change reduces our stack usage from O(n)
to O(log(n)) for poorly chosen pivots.
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Some jpegs, rightly or wrongly, do not contain an EOI marker. This
causes jpg(1) to bail out even after correctly parsing the entire
image.
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vt chording behaves slightly differently from other
applications: a chord must be fully released before
the next chord can be applied. This makes any change
in chord apply the action.
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the driver was not using irb interrupts
and was just polling the irb write pointer
to wait for command completion.
this is not supported by qemu.
qemu requires the use of irb interrupt handshake
and it refuses to accept the next command until we
acknowledge the irb interrupt.
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supplying a non-ip address in ADD_EDGE crashes the unix tincd.
the reason was that we where misreporting ADD_EDGE messages;
ignoring the information from our peers; and always supplying
the Address string from our configuration instead of the
connections ip address.
now we just report the edge information as is.
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The documentation for mp(2) claimed we'd return nil on error, when
we actually sysfatal. This corrects the documentation to match our
actual behavior.
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We used to pick the highest auth type regardless of whether
we supported it. Now we filter down to types that we support.
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mischief)
the access functions for pci config space in config mode #1
used to set bit 0 in the register offset if the access was
to a device on any bus different from 0.
it is completely unclear why this was done and i can't find
any documentation on this.
but for sure, this breaks all pci config spacess access to
pci devices behind a bridge on qemu. with -trace pci* it
was discovered that all config space register offsets on
devies behind pci brige where off by one.
on real hardware, setting bit 0 in the offset doesnt appear
to be an issue.
thanks mischief for reporting and providing a qemu demo
configuration to reproduce the problem.
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On my 6235 card, if we calibrate the crystal
immediately after disabling wimax, the the
firmware gets unhappy. A short nap before
sending the command prevents the command from
timing out.
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When moving messages between folders, mbappend,
deliver, and nedmail were trying to parse the
timestamp ouut of the message. They were doing
it incorrectly, trying to include the user name
as part of the date format.
Change to pass just the date to the date parser.
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ori and echoline are reporting regression on some 6000 cards;
which sometimes time out on crystal calibration command;
which is expected by the driver. but the new code used
to force a device reset on any command timeout.
reverting to old behaviour until for now until we have
a chance investigating.
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We used to assume a 1:1 pairing of processors to submit queues.
With recent machines, we now got more cpu cores than what some
nvme drives support so we need to distribute the queues across
these cpu's which requires locking on command submission.
There is a feature get/set command to probe the number of submit
and completion queues, but we decided to just handling
submission queue create command error gracefully as it is simpler
and has less chance of regression with existing setups.
Thanks to mischief for investigating and writing the code.
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