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put recently used pages at the head of ther image hash
chains, and reclaim pages from the tail first.
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there are no kernels currently that do page coloring,
so the only use of cachectl[] is flushing the icache
(on arm and ppc).
on pc64, cachectl consumes 32 bytes in each page resulting
in over 200 megabytes of overhead for 32gb of ram with 4K
pages.
this change removes cachectl[] and adds txtflush ulong
that is set to ~0 by pio() to instruct putmmu() to flush
the icache.
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detailed timing in edid
vbs/vbe members in Mode was only used in the vesadb
and cannot be changed from vgadb.
use shs/ehs in drivers when refering to the horizontal
sync pulse. clarify the matter in a comment.
link detailed timing modes at the head of the edid
modelist. these are the modes we'r interested in,
not the ones from vesadb.
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igfx and vesa can determine monitor timing information from ddc
and store the edid info for connected monitors in vga->edid[].
when monitor type cannot be found in vgadb, we consult the edid
information and make a mode based on the edid info.
this avoids having to maintain a vgadb entry for each monitor.
monitor can be set to "[width]x[height]@[freq]Hz" for a specific
edid setting. when not found, a mode is searched based on the
size.
so the following should work:
aux/vga -m 1366x768@60Hz -l 1366x768x32
aux/vga -m auto -l 1366x768x32
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dbvesamode() modified the passed in size string in the process
of option parsing. this is a no-go because the string might be
constant in the read only section. provide cracksize() function
for the parsing and make a static copy.
do the vendor specific monitor detection in vbesnarf() instead
of vbecheck(). vbecheck()'s purpose is to check if vesa bios
service is avialable, not snarf graphics card state.
nvidiascale() was a no-op because it missed the vbecall() at
the end of the function. this means it was never tested so i
add the missing vbecall(), but disable nvidiascale for now
until someone tests this.
keep fancy stuff out of the Vbe structure. it is just there for
making bios calls, not keep state about the graphics card.
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we'r hitting the limit of user page banks on some asrock mainboard,
so doubling the size of the array twice to make running out unlikely.
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we used to read beyond the boundaries of the becon because of
the end pointer was offset by the beacon header. this is
also what caused the double entries.
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this bug happens when the kernel runs out of mount rpc
buffers when allocating a flush rpc. in this case, mntflushalloc()
will errorjump out of mountio() leaving the currently in
flight rpc in the mount. the caller of mountrpc()/mountio()
frees the rpc thats still queued in the mount leaving
to interesting results.
for the fix, we add a waserror() arround mntflushalloc() and
handle the error case like a mount rpc failure which will
properly dequeue the rpc's in flight.
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we have to padd the data portion in the password avp,
not add padding after the avp.
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after use
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this adds support for eap-peap/mschapv2 and eap-ttls/pap.
code has only been tested with freeradius and a cheap
access point, not tested with actual eduroam network.
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this is used for wpa2 enterprise peap/mschapv2. server role
is not implemented as that would require changing the
wire format on the auth server.
the naming is unfortunate as we already have proto=mschap2 which
really refers to ntlmv2.
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the FPOFF macro that follows the FXSAVE/FSAVE instructions in l.s
used to execute WAIT instruction when the TS flag was not set. this
is wrong and causes pending exceptions to be raised from fpsave which
is called from provsave() which holds up->rlock making it deadlock
when matherror() tries to postnote() to itself.
so making FPOFF non-waiting (just set TS flag).
we handle pending exception when restoring the context.
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eenter would go into a endless loop in the redraw avoidance case
because the label was misplaced.
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allocate the hardware cursor plane at the end of
preallocated stolen graphics memory.
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some vga drivers use virtual addresses in VGAscr.storage,
so has to be uintptr sized for amd64.
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program secret plane size and position registers described as "reserved"
in g45_vol_3_register_0_0.pdf that was found by inspecting vesa bios
port traces.
also, we have to set 18:19 (Cursor/Dispaly/Overlay Planes Off) in
PIPExCONF while programming the planes on this card. this is what
vesa bios does on modeset.
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avoid sync the jar file when fids get clunked.
the only reason to sync the jar on clunk is when it has
been marked dirty (cookies added or deleted) and we
want to flush the changes to disk.
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dont return deleted cookies on search
- rewrite when jar->dirty != 0 (caller modified the in memory jar)
- reread when the jar->qid != stat(jar->file)->qid (on disk file changed)
- ignore deleted cookies in cookiesearch()
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enable sequence
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(like bios)
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