diff options
| author | Ori Bernstein <ori@eigenstate.org> | 2021-02-08 15:45:11 -0800 |
|---|---|---|
| committer | Ori Bernstein <ori@eigenstate.org> | 2021-02-08 15:45:11 -0800 |
| commit | 566c3ca2de98761f9039e49ca5f68ee1a9ad73c4 (patch) | |
| tree | 0092cb34a16eab20c8e34eb72c017fd10c069875 /power/include/ape/float.h | |
| parent | 491fe2515890fc4e624af72f15775fd48510486a (diff) | |
| download | plan9front-566c3ca2de98761f9039e49ca5f68ee1a9ad73c4.tar.xz | |
ape: sync flaot.h macros with u.h
The float.h macros got out of sync with u.h,
some of them missing and some of them being
incorrect. This change brings them back in
line.
Diffstat (limited to 'power/include/ape/float.h')
| -rw-r--r-- | power/include/ape/float.h | 43 |
1 files changed, 32 insertions, 11 deletions
diff --git a/power/include/ape/float.h b/power/include/ape/float.h index c0992af79..4e3121fc8 100644 --- a/power/include/ape/float.h +++ b/power/include/ape/float.h @@ -50,24 +50,45 @@ union FPdbleword #define Sudden_Underflow 1 #endif #ifdef _PLAN9_SOURCE -/* FCR */ -#define FPINEX (1<<7) -#define FPOVFL (1<<9) -#define FPUNFL (1<<8) -#define FPZDIV (1<<10) +/* FPSCR */ +#define FPSFX (1<<31) /* exception summary (sticky) */ +#define FPSEX (1<<30) /* enabled exception summary */ +#define FPSVX (1<<29) /* invalid operation exception summary */ +#define FPSOX (1<<28) /* overflow exception OX (sticky) */ +#define FPSUX (1<<27) /* underflow exception UX (sticky) */ +#define FPSZX (1<<26) /* zero divide exception ZX (sticky) */ +#define FPSXX (1<<25) /* inexact exception XX (sticky) */ +#define FPSVXSNAN (1<<24) /* invalid operation exception for SNaN (sticky) */ +#define FPSVXISI (1<<23) /* invalid operation exception for â-â (sticky) */ +#define FPSVXIDI (1<<22) /* invalid operation exception for â/â (sticky) */ +#define FPSVXZDZ (1<<21) /* invalid operation exception for 0/0 (sticky) */ +#define FPSVXIMZ (1<<20) /* invalid operation exception for â*0 (sticky) */ +#define FPSVXVC (1<<19) /* invalid operation exception for invalid compare (sticky) */ +#define FPSFR (1<<18) /* fraction rounded */ +#define FPSFI (1<<17) /* fraction inexact */ +#define FPSFPRF (1<<16) /* floating point result class */ +#define FPSFPCC (0xF<<12) /* <, >, =, unordered */ +#define FPVXCVI (1<<8) /* enable exception for invalid integer convert (sticky) */ +#define FPVE (1<<7) /* invalid operation exception enable */ +#define FPOVFL (1<<6) /* enable overflow exceptions */ +#define FPUNFL (1<<5) /* enable underflow */ +#define FPZDIV (1<<4) /* enable zero divide */ +#define FPINEX (1<<3) /* enable inexact exceptions */ +#define FPRMASK (3<<0) /* rounding mode */ #define FPRNR (0<<0) #define FPRZ (1<<0) #define FPRPINF (2<<0) #define FPRNINF (3<<0) -#define FPRMASK (3<<0) #define FPPEXT 0 #define FPPSGL 0 #define FPPDBL 0 #define FPPMASK 0 -/* FSR */ -#define FPAINEX (1<<2) -#define FPAOVFL (1<<4) -#define FPAUNFL (1<<3) -#define FPAZDIV (1<<5) +#define FPINVAL FPVE + +#define FPAOVFL FPSOX +#define FPAINEX FPSXX +#define FPAUNFL FPSUX +#define FPAZDIV FPSZX +#define FPAINVAL FPSVX #endif #endif /* __FLOAT */ |