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| author | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-05-27 00:23:13 +0200 |
|---|---|---|
| committer | cinap_lenrek <cinap_lenrek@felloff.net> | 2015-05-27 00:23:13 +0200 |
| commit | 5ef922959a546d54f19f63344ef5d581cc41c568 (patch) | |
| tree | cd05b26f58158107168985c795a1cbebd81008d9 | |
| parent | d6a91e0ae47b4e1df9a9783c49666e2a7357e277 (diff) | |
| download | plan9front-5ef922959a546d54f19f63344ef5d581cc41c568.tar.xz | |
pci: map pci bars for devices with base class codes (ccrb) 0x00 and 0x0D-0x11 (thanks qeed)
there are a few more device base class codes defined 0x0D-0x11, and
qemu appears to use base class code 0x00 for some of its fake
devices.
| -rw-r--r-- | sys/src/9/pc/pci.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/sys/src/9/pc/pci.c b/sys/src/9/pc/pci.c index 72dfe6c57..d0e804596 100644 --- a/sys/src/9/pc/pci.c +++ b/sys/src/9/pc/pci.c @@ -406,6 +406,7 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent) * and work out the sizes. */ switch(p->ccrb) { + case 0x00: /* prehistoric */ case 0x01: /* mass storage controller */ case 0x02: /* network controller */ case 0x03: /* display controller */ @@ -416,6 +417,11 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent) case 0x0A: /* docking stations */ case 0x0B: /* processors */ case 0x0C: /* serial bus controllers */ + case 0x0D: /* wireless controllers */ + case 0x0E: /* intelligent I/O controllers */ + case 0x0F: /* sattelite communication controllers */ + case 0x10: /* encryption/decryption controllers */ + case 0x11: /* signal processing controllers */ if((hdt & 0x7F) != 0) break; rno = PciBAR0; @@ -439,7 +445,6 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent) } break; - case 0x00: case 0x05: /* memory controller */ case 0x06: /* bridge device */ default: |