From 43a856b5d40ceb570af7755d9f1222093a48aa64 Mon Sep 17 00:00:00 2001
From: Kimapr <kimapr@mail.ru>
Date: Thu, 21 Dec 2023 13:09:53 +0500
Subject: move SSE init code to init, add -mgeneral-regs-only to init.c and
 pic.c

---
 Makefile      |  4 ++++
 stage3/init.c | 12 ++++++++++++
 stage3/main.c | 12 ------------
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/Makefile b/Makefile
index 3b1a428..ea2f5bf 100644
--- a/Makefile
+++ b/Makefile
@@ -66,6 +66,10 @@ stage3/%.o: stage3/%.asm
 
 stage3/interrupts.o: stage3/interrupts.c
 	gcc $(CFLAGS) -mgeneral-regs-only -c $< -o $@
+stage3/pic.o: stage3/pic.c
+	gcc $(CFLAGS) -mgeneral-regs-only -c $< -o $@
+stage3/init.o: stage3/init.c
+	gcc $(CFLAGS) -mgeneral-regs-only -c $< -o $@
 
 stage3/%.o: stage3/%.c
 	gcc $(CFLAGS) -c $< -o $@
diff --git a/stage3/init.c b/stage3/init.c
index e913fee..2e26e19 100644
--- a/stage3/init.c
+++ b/stage3/init.c
@@ -1,6 +1,18 @@
+#include "def.h"
 void kmain();
 
 void init()
 {
+	// enable SSE. long mode demands it is present
+	u64 cr0;
+	asm volatile("mov %%cr0, %0 \n":"=r"(cr0));
+	asm volatile("mov %0, %%cr0"::"r"((cr0 & ~(1 << 2)) | (1 << 1)));
+
+	u64 cr4;
+	asm volatile("mov %%cr4, %0":"=r"(cr4));
+	asm volatile("mov %0, %%cr4"::"r"(cr4 | (1 << 9) | (1 << 10)));
+
+	u16 fpu_cw = 0x37a;
+	asm volatile("fldcw %0"::"m"(fpu_cw));
 	kmain();
 }
diff --git a/stage3/main.c b/stage3/main.c
index a7212b9..a03dc5d 100644
--- a/stage3/main.c
+++ b/stage3/main.c
@@ -125,18 +125,6 @@ void kmain()
 	print_num_pad(features, 2, 32, '0');
 	print(S("\n"));
 
-	// enable SSE. long mode demands it is present
-	u64 cr0;
-	asm volatile("mov %%cr0, %0 \n":"=r"(cr0));
-	asm volatile("mov %0, %%cr0"::"r"((cr0 & ~(1 << 2)) | (1 << 1)));
-
-	u64 cr4;
-	asm volatile("mov %%cr4, %0":"=r"(cr4));
-	asm volatile("mov %0, %%cr4"::"r"(cr4 | (1 << 9) | (1 << 10)));
-
-	u16 fpu_cw = 0x37a;
-	asm volatile("fldcw %0"::"m"(fpu_cw));
-
 	interrupts_init();
 	pic_init();
 	thread_init();
-- 
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